Normal view MARC view ISBD view

Verilog HDL synthesis : a practical primer

Bhasker, J.

Verilog HDL synthesis : a practical primer - Hyderabad: BS Publications, 2016. - xx, 215 p.

ISBN: 9788178000114

Subjects--Topical Terms:
Computer architecture

Dewey Class. No.: 621.392 BHA

Print
Add to your cart (remove)
Suggest for purchase
Save record
BIBTEX Dublin Core MARCXML MARC (non-Unicode/MARC-8) MARC (Unicode/UTF-8) MARC (Unicode/UTF-8, Standard) MODS (XML) RIS ISBD
More searches

Search for this title in:
Other Libraries (WorldCat) Other Databases (Google Scholar) Online Stores (Bookfinder.com) Open Library (openlibrary.org)